U-Boot has provided open source DDR driver for Rockchip Socs, such as RK3036, RK3288, etc. You can access arch/arm/rock-chips/soc_name/sdram_xxx.c for more hack.

Change the DDR frequency on RK3288

U-Boot initialize DDR device via U_BOOT_DRIVER and read device U_BOOT_DRIVER from devicetree.
eg.

&dmc {
    rockchip,num-channels = <2>;
    rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
        0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
        0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
        0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
        0x8 0x1f4>;
    rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
        0x0 0xc3 0x6 0x2>;
    /* Add a dummy value to cause of-platdata think this is bytes */
    rockchip,sdram-channel = /bits/ 8 <0x2 0xa 0x3 0x2 0x2 0x0 0xe 0xe>;
    rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
};

We need to configure different parameters according to types of DDR. RK3288 supports DDR3 and LDDR3. "rockchip,sdram-params" indicates struct rk3288_base_params.
struct rk3288_base_params {
    u32 noc_timing;
    u32 noc_activate;
    u32 ddrconfig;
    u32 ddr_freq;
    u32 dramtype;
    u32 stride;
    u32 odt;
};

The 5th parameter denotes ddr type. 3 denotes DDR3, and 6 denotes LPDDR3.
The 4th parameter denotes ddr frequency. Note that RK3288 support up to 800MHZ for DDR, and up to 533 to LPDDR3.

Use Rockchip's SPL binary

Rockchip has provide a SPL binary to configure DDR device instead of open source u-boot-spl binary, which can autodetect DDR deivce type and initialize.
Maskrom load loader flow:

  1. Maskrom load DDR.bin from mmc device offset 32K
  2. DDR.bin setup SDRAM device, then jump back to maskrom
  3. Maskrom load U-Boot.bin to memory 0x0

In this way, define CONFIG_ROCKCHIP_SPL in board's config file.
i.e.

diff --git a/configs/miniarm-rk3288_defconfig b/configs/miniarm-rk3288_defconfig
index 33a4a56..63a0293 100644
--- a/configs/miniarm-rk3288_defconfig
+++ b/configs/miniarm-rk3288_defconfig
@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3288-miniarm"
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 CONFIG_HUSH_PARSER=y
+CONFIG_ROCKCHIP_SPL=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MMC=y

Note that the way to package image is not the same as the former
dd if=32_LPDDR2_533MHz_LPDDR3_533MHz_DDR3_533MHz_20160803.bin of=rk_spl.bin bs=4 skip=1
tools/mkimage -n rk3288 -T rksd -d rk_spl.bin rk_spl.img
cat u-boot-dtb.bin >> rk_spl.img