RK3128

RK3128 is a high performance Quad-core application processor for smart TV-Box. Especially it is a high-integration and cost efficient SOC for 1080P H.265 TV-Box. Quad-core Cortex-A7 is integrates with separately Neon and FPU coprocessor, also shared 256KB L2 Cache. Mali400 MP2 GPU is embedded to support smoothly high-resolution (1080p) display and mainstream game.
Lots of high-performance interface to get very flexible solution, such as multi-pipe display with HDMI1.4, TV Encoder. Crypto hardware is integrated for support security BOOT. 32bits DDR3/LPDDR2 provides high memory bandwidths for high-performance. HEVC hardware is integrated for support 1080P H.265 video.

Overview

RK3128 have very good Linux support including U-Boot, kernel, graphics, video decoder and encoder.

RK3128 SoC Feature

  • CPU
    • Quad-core ARM Cortex-A7MP Core processor, a high-performance, low-power and cached application processor
    • Full implementation of the ARM architecture v7-A instruction set, ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation
    • Separately Integrated Neon and FPU per CPU
    • 32KB/32KB L1 I-Cache/D-Cache per CPU
    • Unified 256KB L2 Cache
  • GPU
    • ARM Mali400 MP2
    • High performance OpenGL ES1.1 and 2.0, OpenVG1.1 etc
    • Embedded 4 shader cores with shared hierarchical tiler
  • Memory
    • 8KB internal SRAM
    • Dynamic Memory Interface (DDR3/DDR3L/LPDDR2)： Compatible with JEDEC standard DDR3-1066/DDR3L-1066/LPDDR2-800 SDRAM. Supports 32 Bits data width, 2 ranks (chip selects), totally 2GB (max) address space.
    • Nand Flash Interface: Support 8bits async/toggle/syncnandflash, up to 4 banks. 16bits, 24bits, 40bits, 60bits hardware ECC
    • eMMC Interface: Compatible with standard eMMC interface, Support MMC4.5 protocol
    • SD/MMC Interface: Compatible with SD2.0, MMC4.5
  • System Component
    • Timer: 6 on-chip 64bits Timers in SOC with interrupt-based operation
    • PWM: 4 on-chip PWMs with interrupt-based operation
    • WatchDog: 32 bits watchdog counter width
  • Video
    • Real-time video decoder of MPEG-1, MPEG-2, MPEG-4,H.263, H.264, H.265, VC-1, VP8, MVC
    • H.265 up to MP Level 4.1 High Tier : 1080P@60fps
    • H.264 up to HP level 4.2 : 1080p@60fps
    • MPEG-4 up to ASP level 5 : 1080p@60fps
    • MPEG-2 up to MP : 1080p@60fps
    • MPEG-1 up to MP : 1080p@60fps
    • H.263 : 576p@60fps
    • VC-1 up to AP level 3 : 1080p@30fps
    • VP8 : 1080p@60fps
    • MVC : 1080p@60fps
    • Support video encoder for H.264, MVC and VP8
  • JPEG Codec
    • Decoder size is from 48x48 to 8176x8176(66.8Mpixels). Maximum data rate is up to 76million pixels per second
    • Encoder image size up to 8192x8192(64million pixels) from 96x32. Maximum data rate up to 90million pixels per second
  • Display
    • HDMI interface: HDMI version 1.4a, HDCP revision 1.4 and DVI version 1.0 compliant transmitter. Supports DTV from 480i to 1080i/p HD resolution
    • CVBS interface: 10-bit Resolution. PAL/NTSC encoding
  • Camera interface
    • Support up to 5M pixels
    • 8bits CCIR656(PAL/NTSC) interface
    • 8bits raw data interface
  • Audio
    • I2S/PCM with 8 channels: Up to 8 channels (8xTX, 2xRX). Audio resolution from 16bits to 32bits. Sample rate up to 192KHz
    • I2S/PCM with 2ch: Up to 2 channels (2xTX, 2xRX). Audio resolution from 16bits to 32bits. Sample rate up to 192KHz
    • SPDIF: Support two 16-bit audio data store together in one 32-bit wide location.
    • Audio Codec: Digital interpolation and decimation filter integrated. Line-in, Microphone in and Speaker out Interface. On-Chip Analog Post Filter and digital filters. Single–ended or differential Input and Output. Sampling Rate of 8kHz/12kHz/16kHz/ 24kHz/32kHz /48kHz/44.1K/96KHz. Support 16ohm to 32ohm Head Phone and Speaker Phone Output. Mono, Stereo channel supported
  • Connectivity
    • SDIO interface: Embedded one SDIO interface, Compatible with SDIO 3.0 protocol
    • High-speed ADC stream interface: Support single-channel 8bits/10bits interface. DMA-based and interrupt-based operation. Support 8bits TS stream interface
    • TS interface: Supports one TS input channel.Supports 4 TS Input Mode: sync/valid mode in the case of serial TS input; nosync/valid mode, sync/valid, sync/burst mode in the case of parallel TS input.
    • Smart Card: support card activation and deactivation
    • GMAC 10/100/1000M Ethernet Controller: Supports 10/100/1000-Mbps data transfer rates with the RGMII interfaces. Supports 10/100-Mbps data transfer rates with the RMII interfaces.
    • SPI Controller: One on-chip SPI controller
    • UART Controller: 3 on-chip UART controllers
    • I2C controller: 4 on-chip I2C controllers
    • USB Host2.0: Embedded 1 USB Host 2.0 interfaces
    • USB OTG2.0: Compatible with USB OTG2.0 specification. Supports high-speed(480Mbps), full-speed(12Mbps) and low-speed(1.5Mbps) mode
  • Other
    • SAR-ADC(Successive Approximation Register): 3-channel single-ended 10-bit SAR analog-to-digital converter. Sample rate Fs is 200KHz.
    • eFuse: Two high-density electrical Fuse is integrated: 512bits (64x8)

Document

Devices