Rockchip RK3288 is a low power, high performance processor for mobile phones, personal mobile
internet device and other digital multimedia applications, and integrates quad-core Cortex-A17
with separately NEON coprocessor.It also integrates Mali T760 MP4 GPU.

Overview

RK3288 have very good Linux support including U-Boot, kernel, graphics, video decoder and encoder.

RK3288 SoC Feature

• CPU
  • Quad-core ARM Cortex-A17 MPCore processor, a high-performance, low-power and cached application processor
  • Full implementation of the ARM architecture v7-A instruction set, ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation
  • Integrated 32KB L1 instruction cache, 32KB L1 data cache with 4-way set associative
  • 1MB unified L2 Cache
• GPU
  • ARM Mali-T760 MP4
  • High performance OpenGL ES1.1/2.0/3.0, OpenCL 1.1, DirectX 11
  • Embedded 4 shader cores with shared hierarchical tiler
• Memory
  • 100KB internal SRAM, Support security and non-security access
  • Dual channel DDR3-1333/DDR3L-1333, each channel 16/32bits data width, 2 ranks, totally 4GB(max) address space, maximum address space for one rank of channel 0 is also 4GB
  • Dual channel LPDDR2-1066, each channel 32bits data width, 2 ranks, totally 4GB(max) address space, maximum address space for one rank of channel 0 is also 4GB
  • Dual channel LPDDR3-1066, each channel 32bits data width, 2 ranks, totally 4GB(max) address space, maximum address space for one rank of channel 0 is also 4GB
  • Dual channel async Nand Flash(include LBA Nand), 8bits data width, 4 banks, 60bits ECC
  • Single channel async Nand Flash(include LBA Nand), 16bits data width, 4 banks, 60bits ECC
  • Dual channel sync ONFI/toggle Nand Flash , 8bits data width, 4 banks, 60bits ECC
  • eMMC Interface Support MMC4.5 protocol
  • SD/MMC Interface Compatible with SD3.0, MMC ver4.5
• System Component
  • Timer: 8 on-chip 64bits Timers in SOC with interrupt-based operation
  • PWM: 4 on-chip PWMs with interrupt-based operation
  • WatchDog: 32 bits watchdog counter width
• Video
  • Real-time video decoder of MPEG-1, MPEG-2, MPEG-4,H.263, H.264, AVS, VP8, VC-1, MVC
  • H.264 up to HP level 5.2 : 2160p@24fps (3840x2160)
  • MPEG-4 up to ASP level 5 : 1080p@30fps (1920x1088)
  • MPEG-2 up to MP : 2160p@24fps (3840x2160)
  • MPEG-1 up to MP : 1080p@60fps (1920x1088)
  • H.263 : 576p@60fps(720x576)
  • VC-1 up to AP level 3 : 1080p@30fps (1920x1088)
  • VP8 : 2160p@24fps (3840x2160)
  • AVS : 1080p@60fps (1920x1088)
  • MVC : 2160p@24fps (3840x2160)
  • Main/Main10 HEVC/H.265 decoder, 4k@60FPS. Support up to 4096x2304 resolution
  • Support video encoder for H.264, MVC and VP8
• JPEG Codec
  • Decoder size is from 48x48 to 8176x8176(66.8Mpixels). Maximum data rate is up to 76million pixels per second
  • Encoder image size up to 8192x8192(64million pixels) from 96x32. Maximum data rate up to 90million pixels per second
• Display
  • Embedded two channel display interfaces: VOP_BIG and VOP_LIT
  • Parallel RGB LCD Interface: 30-bit(RGB101010),24-bit(RGB888),18-bit(RGB666), 15-bit(RGB565)
  • Serial RGB LCD Interface(optional):2x12-bit, 3x8-bit(RGB delta support), 3x8-bit+dummy
  • MCU LCD interface(optional):i-8080(up to 24-bit RGB), Hold/Auto/Bypass modes
  • TV Interface: ITU-R BT.656(8-bit, 480i/576i/1080i)
  • DDR output interface:parallel RGB and 2x12-bit serial RGB. Single or dual clock out
  • Max output resolution: 3840x2160 (for VOP_BIG), 2560x1600 (for VOP_LIT)
  • HDMI interface: Single Physical Layer PHY with support for HDMI 1.4 and 2.0 operation
  • LVDS interface: Comply with the TIA/EIA-644-A LVDS standard
  • MIPI intreface: Embedded 3 MIPI PHY, MIPI 0 only for TX, MIPI 1 for TX and RX, MIPI 2 only for RX. Support 4 data lane, providing up to 4Gbps data rate
  • eDP interface: Support 4Kx2K @ 30fps eDP.
• Camera interface
  • Support up to 5M pixels
  • 8bits BT656(PAL/NTSC) interface
  • 16bits BT601 DDR interface
  • 8bits/10bits/12bits raw data interface
• Camera Interface and Image Processer
  • Maximum input resolution of 13M pixels
• Audio
  • I2S/PCM with 8ch: Up to 8 channels (4xTX, 2xRX). Audio resolution from 16bits to 32bits. Sample rate up to 192KHz
  • SPDIF: Support two 16-bit audio data store together in one 32-bit wide location. Support biphase format stereo audio data output. Support 16 to 31 bit audio data left or right justified in 32-bit wide sample data buffer. Support 16, 20, 24 bits audio data transfer in linear PCM mode
• Connectivity
  • SDIO interface: Embedded 2 SDIO interface, Compatible with SDIO 3.0 protocol
  • High-speed ADC stream interface: Support single-channel 8bits/10bits interface. Support 8bits TS stream interface. Supports two TS input channels and one TS output channel
  • PS2 interface: Support PS/2 data communication protocol. Support PS/2 master mode
  • Smart Card: support card activation and deactivation
  • Host interface: Low Pin Count interface(8 inputs/16 outputs or 16 inputs/8 outputs)
  • GPS Interface: Single chip, integrate GPS bb with cpu
  • GMAC 10/100/1000M Ethernet Controller: Supports 10/100/1000-Mbps data transfer rates with the RGMII interfaces. Supports 10/100-Mbps data transfer rates with the RMII interfaces
  • SPI Controller: 3 on-chip SPI controller inside
  • Uart Controller: 5 on-chip uart controller inside
  • I2C controller: 6 on-chip I2C controller inside
  • USB Host2.0: Embedded 2 USB Host2.0 interfaces. USB host (ECHI controller) only supports USB2.0, does not support USB1.1. USB host (DW controller) support USB2.0/USB1.1. Supports high-speed(480Mbps), full-speed(12Mbps) and low-speed (1.5Mbps)mode
  • USB OTG2.0: Compatible with USB OTG2.0 specification. Supports high-speed(480Mbps), full-speed(12Mbps) and low-speed (1.5Mbps) mode
• Other
  • Temperature Sensor(TS-ADC): 3 bipolar-based temperature-sensing cell embedded. 3-channel 12-bits SAR ADC
  • SAR-ADC(Successive Approximation Register): 3-channel single-ended 10-bit SAR analog-to-digital converter. Conversion speed range is up to 1 MSPS

Document

Devices